Our TSMC 180nm IO Library offering includes:

  • Flip-chip package support with customer-configurable pads.
  • 1.2V - 1.8V GPIO, 1.8V analog cell, 5V RF analog cell.
  • 20-36V HV analog cell using conventional CMOS processing (no added layers required).
  • Filler, corner, and break cells.

GPIO Features

1.2-1.8V VDDIO/VDD, 50MHz Operation
Output enable (HiZ when disabled)
Drive strength select to support 15|30pF @50MHz
Schmitt trigger receiver
105KΩ selectabe pull-up or pull-down resistor
ESD: 2KV HBM, 500V CDM1

1CDM rating is a function of package size. Rating shown is for nominal packages.

GPIO Block Diagram

180nm Library Operating Conditions

Parameter

Value

VDDIO

Core VDD

1.2V-1.8V ± 10% [1.8V nom]

1.2V-1.8V ± 10% [1.2V nom]

Tj

Max_Load

-40°C to 125°C

15pF (DS=0) | 30pF (DS=1)

180nm Library Cell Size & Metal Stack

Cell Size

Metal Stack

Package

60um x 80um 6M_1MN_RDL Flip-Chip

Library Cell Summary

Cell Type

Feature

Supply/ESD Cells

GPIO Cell

1.8V VDDIO; 1.2V VDD; GND

50MHz, dual drive strengths

Analog Cell

RF Analog Cell

20-30V HV Cell

Break Cells

Filler Cells

Corner Cells

1.8V

5V, low-C

Ultra-low leakage, low-C

VDDIO, VDD, VSS

1um,5um digital & analog

Digital & Analog